SPATIUM M480 PRO PCIe 4.0 NVMe M.2 HS
| Differences are marked in red | SPATIUM M480 PRO PCIe 4.0 NVMe M.2 1TB HS | SPATIUM M480 PRO PCIe 4.0 NVMe M.2 2TB HS | SPATIUM M480 PRO PCIe 4.0 NVMe M.2 4TB HS |
|---|---|---|---|
| Model Name | SPATIUM M480 PRO PCIe 4.0 NVMe M.2 HS | SPATIUM M480 PRO PCIe 4.0 NVMe M.2 HS | SPATIUM M480 PRO PCIe 4.0 NVMe M.2 HS |
| Capacity | 1TB | 2TB | 4TB |
| Controller | PHISON E18 | PHISON E18 | PHISON E18 |
| Flash Memory | 3D NAND | 3D NAND | 3D NAND |
| DRAM Cache | 1GB DDR4 | 2GB DDR4 | 2GB DDR4 |
| Form Factor | M.2 2280 | M.2 2280 | M.2 2280 |
| Interface | PCIe Gen4x4, NVMe 1.4 | PCIe Gen4x4, NVMe 1.4 | PCIe Gen4x4, NVMe 1.4 |
| Compatibility | PCIe Gen4 / Gen3 / Gen2 / Gen1 | PCIe Gen4 / Gen3 / Gen2 / Gen1 | PCIe Gen4 / Gen3 / Gen2 / Gen1 |
| Dimensions | 80.40mm (L) x 23.00mm (W) x 20.40mm (H) | 80.40mm (L) x 23.00mm (W) x 20.40mm (H) | 80.40mm (L) x 23.00mm (W) x 20.40mm (H) |
| Sequential Read up to (MB/s) | 7400 | 7400 | 7400 |
| Sequential Write up to (MB/s) | 6000 | 7000 | 7000 |
| Random Read 4KB up to (IOPS) | 750,000 | 1,000,000 | 1,000,000 |
| Random Write 4KB up to (IOPS) | 1,000,000 | 1,000,000 | 1,000,000 |
| Maximum Operating Power (W) | 9.5 | 10.5 | 11.3 |
| Idle Power PS3 (mW) | 40 | 45 | 50 |
| Low Power L1.2 (mW) | 3 | 3 | 3 |
| Operating Temperatures | 0°C – 70°C | 0°C – 70°C | 0°C – 70°C |
| Storage Temperatures | -40°C – 85°C | -40°C – 85°C | -40°C – 85°C |
| Terabytes Written (TBW) | 700 | 1400 | 3000 |
| Mean Time Between Failure (MTBF) | Up to 1,600,000 Hours | Up to 1,600,000 Hours | Up to 1,600,000 Hours |
| Limited Warranty | 5 Years, or the coverage for the maximum TBW as stated, whichever comes first. | 5 Years, or the coverage for the maximum TBW as stated, whichever comes first. | 5 Years, or the coverage for the maximum TBW as stated, whichever comes first. |
| Advanced Features | TRIM (Performance Optimization, OS Support required)<br /> SMART (Self-Monitoring, Analysis and Reporting Technology)<br /> LDPC (Low Density Parity Check) ECC Algorithm<br /> End to End Data Path Protection<br /> APST (Autonomous Power State Transition)<br /> AES256/Pyrite (Encryption, Data Security) | TRIM (Performance Optimization, OS Support required)<br /> SMART (Self-Monitoring, Analysis and Reporting Technology)<br /> LDPC (Low Density Parity Check) ECC Algorithm<br /> End to End Data Path Protection<br /> APST (Autonomous Power State Transition)<br /> AES256/Pyrite (Encryption, Data Security) | TRIM (Performance Optimization, OS Support required)<br /> SMART (Self-Monitoring, Analysis and Reporting Technology)<br /> LDPC (Low Density Parity Check) ECC Algorithm<br /> End to End Data Path Protection<br /> APST (Autonomous Power State Transition)<br /> AES256/Pyrite (Encryption, Data Security) |
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